1. Field of the Invention
The present invention relates to a non-volatile semiconductor memory device consisting of twin memory cells, each including one word gate and two non-volatile memory elements controlled by two control gates, as well as to a method of actuating such a non-volatile semiconductor memory device.
2. Description of the Related Art
A known non-volatile semiconductor memory device that is capable of electric writing (programming) and erasing is MONOS (metal-oxide-nitride-oxide-semiconductor or -substrate) type, where a gate insulating layer between a channel and a gate is a laminate of a silicon oxide film, a silicon nitride film, and a silicon oxide film and the silicon nitride film traps electric charges.
The MONOS-type non-volatile semiconductor memory device is disclosed in a reference Y. Hayashi et al, 2000 Symposium on VLSI Technology Digest of Technical Papers p.122–123). This cited reference describes a twin MONOS flash memory cell having one word gate and two non-volatile memory elements (also be referred to as MONOS memory elements or cells) controlled by two control gates. Namely one flash memory cell has two trap sites of electric charges.
The MONOS-type non-volatile semiconductor memory device includes multiple twin MONOS flash memory cells of such structure, which are arrayed in rows and columns.
This non-volatile semiconductor memory device (flash memory) carries out data reading, writing (programming), and erasing operations. The data programming operation and the data reading operation are typically performed by the unit of 1 byte (8 bits) or by the unit of 1 word (16 bits). The procedure of the data programming operation or the data reading operation simultaneously selects 1 byte of or 1 word of non-volatile memory elements and simultaneously writes or reads data into or from these selected non-volatile memory elements (selected cells). The respective bit signals corresponding to these selected cells are input and output via I/O lines.
In the field of semiconductor memory devices, with the increased storage capacity and the enhanced access speed, the twin MONOS-type non-volatile semiconductor memory device consisting of twin MONOS flash memory cells is required to have the high access speed. In order to fulfill this requirement and enhance the read and write access speed, most semiconductor memory devices have a ‘page mode reading’ function to read data in a page mode for high-speed reading and a ‘page buffer writing’ function to write data into a page buffer for high-speed writing.
In the case of reading data from the semiconductor memory device by the ‘page mode reading’ function, in response to specification of a row address in the semiconductor memory device, all the contents of multiple memory elements or memory cells corresponding to the row address are registered in a temporary buffer in the semiconductor memory device. As the column address changes, the corresponding data are read from the temporary buffer and are output. The speed of reading data from the temporary buffer is higher than the speed of reading data from the memory cells. The ‘page mode reading’ function thus attains the high-speed read access.
In the case of writing data into the semiconductor memory device by the ‘page buffer writing’ function, multiple data of an identical row address but different column addresses are successively input and are registered in the page buffer. The multiple data registered in the page buffer are collectively written into multiple corresponding memory elements. The ‘page buffer writing’ function, which collectively writes multiple data into the corresponding memory elements, attains the high-speed write access.
In the prior art twin MONOS-type non-volatile semiconductor memory device, however, data are read and write by the unit of 1 byte or by the unit of 1 word, as mentioned previously. Namely the prior art twin MONOS-type non-volatile semiconductor memory device does not have the ‘page mode reading’ function or the ‘page buffer writing function’ and thereby can not attain the sufficiently high access speed.